Automatic Test Pattern Generation (ATPG)
What is ATPG?
- Test pattern generation (TPG) is the process of generating test patterns for a given fault model, i.e. SA, bridging etc.
- It is impossible to manually use exhaustive testing, Boolean difference or simple path sensitization method to generate test patterns for chips consisting of millions of logic gates
- Practically, we don’t go for a single type of fault, rather there exists a large list of faults and each requires their own patterns and hence we require a automated process for generating test patterns, called Automatic Test Pattern Generation (ATPG)
ATPG scenario
Let us consider a combinational circuit as shown, where the target fault is SA1 and in previous modules we found {0XX} be the pattern for it:
SA1and test vectors
ATPG is a Decision problem
Now, the task of a ATPG is to traverse the binary tree and find out appropriate input combination for a given solution
The speed of ATPG will depend on how quickly we can identify appropriate solution path
For that what we can do?
- Identification & discard unnecessary input as quickly as possible
- Assignment of appropriate input values as quickly as possible
SO, ATPG is a decision problem
Random patterns
If we apply patterns at a random manner there could be chances that quickly solutions can be hit, and in fact for a given time we can reach up to a coverage close to 100 % but never reach to it,
Coverage is the percentage of test vectors which are able to find a fault
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Coverage vs. Time graph for a Random pattern problem |
Deterministic patterns
For a deterministic patterns the test vectors takes a bit longer time but surely is able to find all the faults from a list of faults, thus provides a 100 % coverage ideally
• A few example of deterministic ones are Boolean difference, sensitization method, D-algorithm etc.
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Coverage vs. Time for a Deterministic pattern problem |
A typical ATPG Flow
- A typical ATPG flow starts with a set of faults & the netlist of the design
- With a random TPG first quickly a few faults are identified with the help of a step called ‘fault simulation’
- If the coverage is low then only a deterministic test pattern (TP) is generated with special algorithms like D, PODEM, etc.
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A typical ATPG Flow |
ATPG summary
- We have seen what is ATPG, and it was found that it is a decision problem, also learned how the coverage vs. time behaves for the deterministic & random ATPG
- An example of ATPG flow was considered, some steps are termed like Fault collapsing, Fault simulation, for details, follow their respective links
- An excellent deterministic pattern generation algorithm is D-algorithm